6502 datapath control timing fix

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Revision as of 18:17, 5 January 2011 by EdS (Talk | contribs)
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A couple of transistors are connected to one clock, but the poly shows evidence that they used to be connected to another. See the missing contacts here in the JavaScript simulator.

6502 photo wrong-clock.jpg

That is, the gates were originally laid out so they could be clocked by not-phi1 but in fact are clocked by phi2. They control the X and the Y driving onto SB (special bus). There's another pair like them further along, which control the driving of the A onto the SB and the IDB. Seems like a fix for a timing marginality?


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