650X Schematic Notes

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Notes on the original 650X schematics from MOS Technology as safeguarded by Donald F Hanson.
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Notes on the original 650X schematics from MOS Technology, as safeguarded by Donald F Hanson.
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=== Origin ===
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In 1979, Donald F Hanson sought original design data for microprocessors and contacted several microelectronics companies. MOS Technology provided him with blueprint copies of two sheets which make up the logic diagram for a 6502-series microprocessor.
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[[File:6502 rb sheet1-11-74.id.jpeg|400px|thumb|right|ID from sheet 1]]
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[[File:6502 dc sheet2-8-12-75.id.jpeg|400px|thumb|right|ID from sheet 2]]
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In 2011 he kindly forwarded scans of these two sheets to the visual6502 project and agreed that we could show details from them with a credit line as follows:
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  Credit:  “MOS Technology, 1974-75, 6502 rev C, for educational use only.”
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For further details of his improved modelling language for MOS design, see [[http://www.witwright.com/DonPub/DSH_6502_ComputerArch.pdf his paper]].
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We thank Dr Hanson for these materials.  Our analysis of the schematics follows below.
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=== Overview ===
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=== Pin Names ===
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=== Chip Versions: 6501 and 6502 ===
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=== Chip Revision C, ROR Bug, Other Errors ===
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=== Schematic Errors ===
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=== References ===
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* Donald F. Hanson, [[http://www.witwright.com/DonPub/DSH_6502_ComputerArch.pdf "A VHDL Conversion Tool for Logic Equations with Embedded D Latches,"]], Technical Committee on Computer Architecture Newsletter, pp. 49-56, Spring 1995, IEEE Computer Society.

Revision as of 11:21, 20 October 2011

Notes on the original 650X schematics from MOS Technology, as safeguarded by Donald F Hanson.

Contents

Origin

In 1979, Donald F Hanson sought original design data for microprocessors and contacted several microelectronics companies. MOS Technology provided him with blueprint copies of two sheets which make up the logic diagram for a 6502-series microprocessor.

In 2011 he kindly forwarded scans of these two sheets to the visual6502 project and agreed that we could show details from them with a credit line as follows:

 Credit:  “MOS Technology, 1974-75, 6502 rev C, for educational use only.”

For further details of his improved modelling language for MOS design, see [his paper].

We thank Dr Hanson for these materials. Our analysis of the schematics follows below.

Overview

Pin Names

Chip Versions: 6501 and 6502

Chip Revision C, ROR Bug, Other Errors

Schematic Errors

References

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