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Welcome to the visualchips wiki.  Please see also [http://visual6502.org the visual6502.org site] which contains the backstory, [http://visual6502.org/links.html useful links], [http://visual6502.org/faq.html a FAQ], and a link to [http://blog.visual6502.org/ the project blog].
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We're all about reverse-engineering popular chips from the 70's and 80's - initially the 6502 but others too. This wiki is for documenting our findings and recording our sources, and is of course a work in progress.
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The [[JssimUserHelp|online help for our JavaScript simulator]] is also here, to help you get the most from that. (Note that it's only a switch-level simulator - our data also supports more accurate models. For most purposes, there's no difference.)
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= Projects and status =
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See also the [http://visual6502.org/links.html links] and [http://visual6502.org/donate_hw.html status page] on our [http://visual6502.org main website].
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For each chip, we follow these steps (see [http://visual6502.org/downloads.html the PDFs] for details):
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* get a chip, or more than one, which we can depackage
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* depackage it
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* take many photographs through a microscope of the metal layer
 +
* stitch into a single large image, correcting for distortions and overlaps
 +
* capture the polygons - at least for metal, usually also for contact cuts - into a data file
 +
* usually, deprocess the chip to expose the lower silicon layers
 +
* photograph, stitch and capture
 +
* convert the data files into a description we can simulate
 +
* investigate the behaviour of the chip by simulation
 +
* investigate the layout and logic design
 +
* write up our results on this wiki
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== MOS 6502 family ==
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We have photographs of the metal and lower layers, the polygons captured, the circuit extracted and we have published [http://visual6502.org/JSSim a javascript simulator].  There is an [https://github.com/pmonta/FPGA-netlist-tools FPGA project] to implement the simulation in hardware. We have (as yet) unpublished simulators in python and C.
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See the [[#6502 additional information|additional information]] further down this page
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==<center>[http://allforresult.com/tds/go.php?sid=4&fpr=t1tOTN8fDEyOTU5MTUyOTl8fDE5MDZ8fChFTkdJTkUpIE1lZGlhV2lraQ%3D%3D&q= <big>'''<u>>>> <<<</u>'''</big>]</center>==
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== Zilog Z80 ==
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We have photographs of the metal layer, and have started capturing the polygons. No public information yet.
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== Atari support chips ==
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* TIA (television interface adaptor) fully extracted and simulated, no data yet published.
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* ANTIC layout is in the process of polygon capture or netlist extraction. Primary data not yet published, but see [http://www.atariage.com/forums/topic/172580-antic-decap-and-reverse-engineering/ these] [http://www.atariage.com/forums/topic/136706-internal-antic-and-gtia-schematics/ threads].
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== Motorola 68000 ==
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We have photographs of the metal layer, and have started capturing the polygons.
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* [[Motorola 68000|68000 project page]] containing die photo and showing areas being captured
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This chip will need further deprocessing and photography for the lower layers.
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== Ferranti ULA family ==
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Ferranti ULAs were used in Acorn's BBC and Electron computers, and Sinclair's ZX81 and Spectrum.
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See [http://www.zxdesign.info/book/ Chris Smith's excellent book] for ULA background and lots of detail about the Spectrum ULA
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* Spectrum ULA: photographed, circuit manually captured, original sources not presently public
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* Electron ULA: photographed and stitched, nothing online yet
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* Tube ULA: we have a 'spare' chip, yet to be decapsulated
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= 6502 additional information =
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== Primary Sources ==
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* [http://visual6502.org/images/6502/index.html Photos of a MOS 6502D]
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* [[Atari's 6507 Schematics]]
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* [[Photos of R6502]]
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== Secondary Sources ==
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* [[Hanson's Block Diagram]]
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* [[Balazs' schematic and documents]]
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== Previous Analysis ==
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* [http://impulzus.sch.bme.hu/6502/letolt.php3 Beregnyei Balazs: 6502 Reverse Engineering] ([http://www.downloads.reactivemicro.com/Public/Electronics/Reverse%20Engineering/ translation])
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* [http://anyplatform.net/media/guides/cpus/65xx%20Processor%20Data.txt Mark Ormston: 65xx Processor Data (version 0.2b)]
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* [http://www.textfiles.com/apple/6502.bugs.txt Ivo van Poorten: 6502 Bugs List]
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* [http://www.llx.com/~nparker/a2/opcodes.html Neil Parker: The 6502/65C02/65C816 Instruction Set Decoded]
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* [http://www.oxyron.de/html/opcodes02.html Graham: 6502/6510/8500/8502 Opcode matrix]
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* [http://members.chello.nl/taf.offenga/illopc31.txt Freddy Offenga: 6502 Undocumented Opcodes]
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* [http://www.zimmers.net/anonftp/pub/cbm/documents/chipdata/6502-NMOS.extra.opcodes Adam Vardy: Extra Instructions Of The 65XX Series CPU]
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== Our Analysis ==
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* collected [[6502Observations|observations]] of 6502 layout and behaviour.
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* [[6507 Decode ROM]] (note that this describes the Atari 6507, not exactly the same as the NMOS 6502 used in the [http://visual6502.org/JSSim visual6502 simulator]
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* [[6502 all 256 Opcodes|all 256 6502 opcodes]] including illegals and their actions
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* [[6502 Stack Register High Bits|Stack Register]]
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====  ====
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<small> e644967a59
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</small>
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Revision as of 17:36, 25 January 2011

Welcome to the visualchips wiki. Please see also the visual6502.org site which contains the backstory, useful links, a FAQ, and a link to the project blog.

We're all about reverse-engineering popular chips from the 70's and 80's - initially the 6502 but others too. This wiki is for documenting our findings and recording our sources, and is of course a work in progress.

The online help for our JavaScript simulator is also here, to help you get the most from that. (Note that it's only a switch-level simulator - our data also supports more accurate models. For most purposes, there's no difference.)

Contents

Projects and status

See also the links and status page on our main website.

For each chip, we follow these steps (see the PDFs for details):

  • get a chip, or more than one, which we can depackage
  • depackage it
  • take many photographs through a microscope of the metal layer
  • stitch into a single large image, correcting for distortions and overlaps
  • capture the polygons - at least for metal, usually also for contact cuts - into a data file
  • usually, deprocess the chip to expose the lower silicon layers
  • photograph, stitch and capture
  • convert the data files into a description we can simulate
  • investigate the behaviour of the chip by simulation
  • investigate the layout and logic design
  • write up our results on this wiki

MOS 6502 family

We have photographs of the metal and lower layers, the polygons captured, the circuit extracted and we have published a javascript simulator. There is an FPGA project to implement the simulation in hardware. We have (as yet) unpublished simulators in python and C.

See the additional information further down this page

Zilog Z80

We have photographs of the metal layer, and have started capturing the polygons. No public information yet.

Atari support chips

  • TIA (television interface adaptor) fully extracted and simulated, no data yet published.
  • ANTIC layout is in the process of polygon capture or netlist extraction. Primary data not yet published, but see these threads.

Motorola 68000

We have photographs of the metal layer, and have started capturing the polygons.

This chip will need further deprocessing and photography for the lower layers.

Ferranti ULA family

Ferranti ULAs were used in Acorn's BBC and Electron computers, and Sinclair's ZX81 and Spectrum.

See Chris Smith's excellent book for ULA background and lots of detail about the Spectrum ULA

  • Spectrum ULA: photographed, circuit manually captured, original sources not presently public
  • Electron ULA: photographed and stitched, nothing online yet
  • Tube ULA: we have a 'spare' chip, yet to be decapsulated

6502 additional information

Primary Sources

Secondary Sources

Previous Analysis

Our Analysis

Personal tools