Motorola 6800

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m (Protected "Motorola 6800" ([edit=autoconfirmed] (indefinite) [move=autoconfirmed] (indefinite)))
(Points of Interest: pulse shaping example)
 
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Placeholder page for the analysis of the Motorola 6800 CPU.
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See [http://en.wikipedia.org/wiki/Motorola_6800 Wikipedia] for good technical and historical information and references on the Motorola 6800.
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Principally a place where we can link to the block diagram from the [http://www.google.com/patents?id=6OkAAAAAEBAJ&zoom=4&pg=PA3#v=onepage&q&f=false 1976 topology patent] (See also [http://www.freepatentsonline.com/4090236.pdf this later patent.])
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=== Chip Photos ===
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We [http://www.visual6502.org/images/pages/Motorola_6800_die_shots.html depackaged, deprocessed and photographed] a later depletion-load version of the chip, which shows signs in the layout of the previous enhancement-load version.  Ijor then captured polygons from the photos - here are JPEG images, which may be easier to explore than the svg format:
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[[File:Mc6800a-Layout-svg-150h.jpg|link=http://www.visual6502.org/images/6800/mc6800a-Layout-svg-1200w.jpg|Medium size]]
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[[File:Mc6800a-Layout-svg-150h.jpg|link=http://www.visual6502.org/images/6800/mc6800a-Layout-svg-8980w.jpg|Full size (14Mbyte)]]
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The recaptured polygon data closely resembles the original layout which defined the masks used to manufacture the chip, and is a great deal easier to study than the photographs.
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=== Chip Simulator ===
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From the polygons we were able to construct a netlist, and Segher then labelled many of interior nodes, and so we present our JavaScript simulator: [http://visual6502.org/JSSim/expert-6800.html?nosim=t (graphical mode)] [http://visual6502.org/JSSim/expert-6800.html?graphics=f&loglevel=4&steps=20 (non-graphical mode)]. As with our 6502 simulator, you can explore the layout and the behaviour, find signals and transistors by name, and share short test programs by URL.
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=== Points of Interest ===
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We've found these interesting features (more detail to be added):
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* register circuit using resistive feedback and enhancement-style pullups
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* data latch circuit using weak feedback transistor
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* clock pulse shaping
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** both [http://visual6502.org/JSSim/expert-6800.html?nosim=t&find=251 node 251] and [http://visual6502.org/JSSim/expert-6800.html?nosim=t&find=abh/ahd abh/ahd] are inverted phi2 signals
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** [http://visual6502.org/JSSim/expert-6800.html?nosim=t&find=95 node 95] is phi2 and not abh/ahd and therefore a phi2 with a delayed rising edge
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* resistive bus pullup
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* Manchester carry chain
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* [http://visual6502.org/JSSim/expert-6800.html?nosim=t&find=t5074&panx=214.1&pany=105.8&zoom=12.4 unexplained circuit] isolating IRQ and HALT near PHI1 pin
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=== Block Diagram ===
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Here's the block diagram from the [http://www.google.com/patents?id=6OkAAAAAEBAJ&zoom=4&pg=PA3#v=onepage&q&f=false 1976 topology patent] (See also [http://www.freepatentsonline.com/4090236.pdf this later patent.]):
[[File:M6800-arch.png]]
[[File:M6800-arch.png]]
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=== Resources ===
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* [http://en.wikipedia.org/wiki/Motorola_6800 Wikipedia article]
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* [http://people.sinclair.edu/nickreeder/eet252/datasheets/MC6800.pdf Datasheet (pdf)] (Nick Reeder at Sinclair Community College)
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* [ftp://ftp.comlab.ox.ac.uk/pub/Cards/txt/6800.txt Instruction set summary] (comlab at Oxford University)
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* [http://www.sbprojects.com/sbasm/6800.htm#model Programming Model] (website for SB-assembler)
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* [http://www.freepatentsonline.com/4090236.pdf US Patent 4090236] for single power supply NMOS microprocessor (filed 1976, granted '78) contains block diagrams, state transition diagrams, instruction decode tables, circuit and logic diagrams
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* [http://www.google.com/patents/about?id=6OkAAAAAEBAJ US Patent 3987418] for MOS microprocessor topography (filed 1974, granted '76) contains floorplan, low resolution layout mask images, block diagram

Latest revision as of 19:47, 11 April 2011

See Wikipedia for good technical and historical information and references on the Motorola 6800.

Contents

Chip Photos

We depackaged, deprocessed and photographed a later depletion-load version of the chip, which shows signs in the layout of the previous enhancement-load version. Ijor then captured polygons from the photos - here are JPEG images, which may be easier to explore than the svg format:

Medium size Full size (14Mbyte)

The recaptured polygon data closely resembles the original layout which defined the masks used to manufacture the chip, and is a great deal easier to study than the photographs.

Chip Simulator

From the polygons we were able to construct a netlist, and Segher then labelled many of interior nodes, and so we present our JavaScript simulator: (graphical mode) (non-graphical mode). As with our 6502 simulator, you can explore the layout and the behaviour, find signals and transistors by name, and share short test programs by URL.

Points of Interest

We've found these interesting features (more detail to be added):

  • register circuit using resistive feedback and enhancement-style pullups
  • data latch circuit using weak feedback transistor
  • clock pulse shaping
    • both node 251 and abh/ahd are inverted phi2 signals
    • node 95 is phi2 and not abh/ahd and therefore a phi2 with a delayed rising edge
  • resistive bus pullup
  • Manchester carry chain
  • unexplained circuit isolating IRQ and HALT near PHI1 pin

Block Diagram

Here's the block diagram from the 1976 topology patent (See also this later patent.): M6800-arch.png

Resources

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