The ChipSim Simulator
The source code is copyright with an open source license and available on github.
- defines an array transdefs, with a typical element
['t1', 1608, 657, 349, [5424, 5629, 548, 922],[1007, 1079, 17, 5, 17477] ], defining the name, the gate net, the source and drain nets, the bounding box, and some geometrical information. See this source file for more detail.
(These formats are subject to revision, as we model new chips and find information which is worth capturing and modelling.)